This page contains the initial specification for the CVL.

The task at hand is to build a current and voltage data logger that will assist other students with their endeavors in the lab. Commercial, off the shelf data loggers exist but are often proprietary and closed source. We have a unique opportunity to build an open source data logging platform that can serve as an educational tool for other students in the future as well.

The CVL needs to have hardware that is able to collect current and voltage readings and transmit that data to a computer.

Major blocks:

• Microcontroller and supporting components
• Power circuits (regulators, etc.)
• Printed circuit board
• Data collection circuitry (op amps, external ADCs, cables, etc.)
• User interface components (buttons, switches, etc.)

Firmware needs to be written that will allow on the on-board microcontroller to run during the data collection process. The firmware sits in-between the hardware and the software application that runs the CVL.

Here is what we need it to do:

• Accept commands from the CVL control application
• Run sampling subroutines
• Handle power management
• Send real-time sampling data to the CVL control application

The firmware is required to be posted on Github as an open sourced repository.

The software component of the CVL will run on a user's computer and act as the primary interface to the CVL. The following objectives must be accomplished:

• Collect real-time data from the CVL hardware
• Display data after collection is complete
• Save, browse and collect datasets
• Select which type of data we want to collect (current, voltage, etc.)
• Select what kind of sampling rate we want

The software is required to be posted on Github as an open sourced repository.

Since the initial project is being done in one semester a minimum viable product (MVP) must be built instead of a more polished prototype. See this page for more details: https://en.wikipedia.org/wiki/Minimum_viable_product

Think about how we can build something that will be of benefit to the most people. Someone should ultimately at the end find some use out of the tool - polishing of the tool, regardless of hardware or software can be accomplished after we have something that is done.

1. Drive progress as a team (with help from mentors/advisers)
2. Ask questions
3. Consult with other teams
4. Keep good documentation on the wiki
5. Be honest

1. A working prototype of the CVL
2. A bill of materials (BOM) for the final prototype
3. User documentation for the CVL
4. Various block diagrams
   1. hardware block diagram
   2. firmware block diagram
   3. software block diagram
5. An overall system block diagram
6. A PDR in oral and PDF form
7. A CDR in oral and PDF form
8. A final presentation in oral and PDF form
9. A final paper

Note that some of these things may overlap with each other. For example, user documentation is definitely something that can be included in the final paper. The various block diagrams will also be used for the presentations.

These are suggested tasks that you should start with:

• Understand the problem - make sure you fully understand the problem at hand before we move on. What is it we're trying to accomplish here, and what problem are we trying to solve? If you can't answer this, or you answer it incorrectly you'll be setup for failure later on.
• Create a revised specification sheet - take the initial specification sheet and make it more detailed. Ask questions to clarify. Fix any mistakes and put more details in each category and use that to help drive further development of your project.
• Come up with a task list - what actually needs to be done? Are there any tasks that might block other tasks? You might not have enough information to know every detail right now, but list what you can and be sure to come back to the task list when you have more information.
• Come up with a schedule - make sure that you pace yourselves correctly during the course of the semester. Since everyone has limited time you'll need to pay attention to this.

Contributing authors:

Created by kluong on 2016/01/18 05:26.